This invention relates to high-density electronic device testing.
Testing of electronic circuits has been made much more difficult by two developments. First, manufacturers are placing more electronic components on a single integrated circuit substrate (IC). Second, multiple discrete ICs are being combined on printed wiring boards (PWBs) and multi-chip module substrates (MCMs) of ever smaller dimensions. MCMs typically include several ICs attached to a substrate. Etched interconnection wiring paths link nodes (e.g., terminals or pads) of one IC to another.
Testing of ICs may be done in situ on a semiconductor wafer, after the ICs are separated into individual dies, or after they are assembled onto PWBs or MCM substrates. The MCM substrates and PWBs may also be tested before ICs are mounted on them.
Continual miniaturization challenges existing testing equipment. One type of test performed on devices measures the integrity of node-to-node interconnections (called "nets"). The effectiveness of such testing is typically described by the number of tests per second (the speed), based on the smallest inter-node distance the measurement probe can safely access (the test probe size). As the number of nets goes up and the inter-node distance goes down, testing methods must provide higher speeds and a smaller test probe size to remain effective and cost-competitive.
One established testing method employs a so-called "bed of nails" tester, comprising an array of electrical contact points. During tests, the contact array simultaneously strikes a corresponding array of nodes. Testing of a PWB or MCM substrate for electrical continuity and shorts using a bed of nails tester proceeds rapidly in parallel, with many nodes being tested at the same time. But the size of bed of nails testers cannot be reduced indefinitely as circuit size shrinks.
Another testing method uses only one or a few probes that are rapidly moved from node to node across the circuit substrate, testing individual nodes (or small groups of nodes) serially. Testing speeds for such probe testers are limited by the velocity of the mechanical stage that holds the circuit substrate, or the probe, to a few tests per second, but research may extend this speed to 30 to 50 tests per second. One approach employs a multi-probe array (with, for example, two probe testers) that increases testing speed by performing more than one test at a time.
Researchers are also exploring the use of a focused beam of electrons to test circuit substrates. A rapidly moving electron beam alternately charges and then senses the voltage on individual circuit nets, all within a high vacuum.